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CoWare's HDL co-simulation interface supports SystemC/HDL co-simulation between CoWare Platform Architect, CoWare Model Designer and CoWare Signal Processing Designer (formerly SPW) products and the Incisive Verilog/VHDL simulator from Cadence.
Capabilities include automated SystemC-HDL executable generation; fast, single process simulation; support for multiple HDL blocks, and mixed HDL language support (Verilog and VHDL, as supported by NC-Sim).
CoWare's RTL generation technologies for signal processing hardware components (CoWare Signal Processing Designer) and programmable hardware accelerators (CoWare Processor Designer) generate RTL and synthesis scripts targeted for the Cadence Encounter implemen tation solution.
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Mentor Graphics® provides software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design.
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CoWare and Novas support display of waveform results from
CoWare Platform Architect and Model Designer in the Novas Debussy Debug System,
a popular debugging environment familiar to many HDL developers.
News
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CoWare's HDL co-simulation interface supports SystemC/HDL co-simulation between CoWare's Platform Architect and Model Designer products and the VCS-MX Verilog/VHDL simulator from Synopsys.
Capabilities include automated SystemC-HDL executable generation; fast, single process simulation; support for multiple HDL blocks, and mixed HDL language support (Verilog and VHDL, as supported by VCS-MX).
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