CoWare CoWare Japan


 
Solution Overview
Platform Architecture Design Solution
Platform Verification Solution
Software Development Solution
Application Sub-System Design Solution
Processor Design Solution
DSP Algorithm Design Solution
 

"I have heard horror stories going from floating point to fixed point implementation. Once we could "flip the switch" using SPW, this was easy!"

—Ken Bartsch
Interdigital Communications

 
Solution Spotlight

SPW Articles

Customer Testimonial: ElementCXI

Project Results: Interdigital

Ecosystem Partners

Whitepaper: A Framework for Fast Simulation of DSP Algorithms on Multiprocessors

 
Related Tools and Services

CoWare SPW (including Wireless Reference Libraries and Hardware Design System Options)

CoWare Processor Designer

The DSP Algorithm Design solution addresses the exploration and implementation of complex digital signal processing (DSP) algorithms for consumer and infrastructure products in wireless, automotive and aerospace & defense applications. In today’s products algorithms can no longer be invented in isolation of the implementation. Therefore design teams look for a solution that gives them maximum innovation opportunity with a solid path to implementation.

Adhoc methodologies using MATLAB/C-modeling are very expensive because they prevent reuse of models And they involve multiple, costly rewrites of individual models. Given the time and budget constraints of today’s product developments design teams are moving to methods that allow them a much quicker path into implementation, while optimizing the system performance and cost.

CoWare Solution
The CoWare solution allows assembling DSP systems quickly based on a large number of reference models available in C source code. In addition, designers can leverage production-proven, wireless reference libraries for major standards like 3GPP/LTE. Using CoWare's optimizing compiled simulation technology, the design space exploration is quick. Floating-point to fixed-point refinement is facilitated by a very clear modeling style and the underlying polymorphic C++ infrastructure. Implementation of fixed hardware is supported through production-proven cosimulation and RTL code generation – both from block diagrams and user written C-models - in addition to cosimulation of analog mixed-signal circuits. Programmable accelerators designed with CoWare Processor Designer can be verified through the integration of the generated ISS into the system simulation.